CEF32

GB_uCode


This is an implementation of a theoretical microcode  engine.  A 64-bit CPU with 32-bit instructions. 
 Characteristics:



	
	

		
			
Big Endian      No

				
	

	

		
			
Default Base    10

				
	

	

		
			
Page size       256

				
	




Startup commands:



	
	
	

		
			
Command

				
		
			
Description

				
	

	

		
			
ROM n

				
		
			
Sets the microcode ROM to the specified file.

				
	




The following signals are supported by this component:



	
	
	

		
			
Signal Name

				
		
			
Description

				
	

	

		
			
INT

				
		
			
Interrupt.

				
	

	

		
			
SINT

				
		
			
Simple interrupt.

				
	

	

		
			
INTA

				
		
			
Interrupt acknowledge.

				
	

	

		
			
RESET

				
		
			
Reset CPU

				
	

	

		
			
LOCK

				
		
			
Lock bus for exclusive CPU access.